The present invention relates to a monolithically integratable signal amplifier circuit, especially to an amplifier stage with high output dynamics.
An amplifier stage with high output dynamics generally comprises a pair of series connected final transistors operating in class AB connected between the two terminals of a supply voltage generator by their emitter and collector terminals and arranged so as to conduct in phase opposition via their base terminals. The output terminal of the amplifier stage is constituted by the connection point between the two transistors.
In this instance, the maximum possible amplitude of the output signal, which is equal to the supply voltage minus the voltage loss of the circuit or the minimum voltage necessary for the circuit to maintain its typical operating characteristics, is equal to the supply voltage minus twice the collector-emitter voltage V.sub.CE sat of a bipolar transistor operating in saturation. In fact, in an amplifier stage having transistors operating in class AB, the minimum voltage loss is obtained through each signal half wave causing the final transistor which is conducting to operate in saturation when the input signal reaches the level corresponding to the maximum output amplitude.
More or less complex circuits are used by those skilled in the art for amplifier stages of this type as a function of the characteristics to be obtained. For example, an output stage with high dynamics presenting a minimum operating voltage less than that of the other known circuits is described in U.S. Pat. No. 4,575,686 to Palara et al.